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OPI Summit on DPUs/IPUs 2026: Open Standards, Automated Onboarding, and Multi-Vendor DPUs

By October 1, 2026No Comments

DPUs and SuperNICs have quietly become the backbone of AI factories, HPC clusters, and hyperscaler networks – but the software and hardware ecosystem around them has, until recently, been locked behind vendor walls. 

The Open Programmable Infrastructure (OPI) community is working to change that, and this year’s summit lineup is a direct reflection of that mission: vendor-neutral APIs, open blueprints, real hardware demos, and hard-won lessons from engineers moving production workloads onto DPU and IPU silicon.

Whether you’re building the next generation of infrastructure-acceleration contributors, wrestling with a fragmented NIC/DPU hardware matrix, or trying to move a legacy storage daemon onto a fleet of DPUs, this year’s sessions have something concrete to offer. This blog will look at some of the highlights from the agenda.

To view the complete schedule and register for the event, go here. 

From Factory State to Platform Handoff: Automating DPU Onboarding with sZTP 

Anssi Söderena, Senior Software Developer, FusionLayer, Inc (Finland) 

A DPU is not ready for production merely by booting or acquiring an IP address; it requires a trusted identity, validated configurations, software compatibility, and verified readiness. This session presents an OPI Blueprint using FusionLayer’s RFC 8572 sZTP client and server to automate the secure onboarding of an NVIDIA BlueField-3 DPU from a factory-default state through bootstrap execution and trust verification. It demonstrates full platform integration into a Red Hat OpenShift and F5 BIG-IP Next environment, validating end-to-end traffic flow from a virtual IP through the DPU’s traffic-processing engine to application pods. Ultimately, the session details the complete workflow, validation metrics, compatibility boundaries, and key insights into separating repeatable sZTP onboarding from platform-specific integration.

Reimagining DPUs for Storage Control and End-to-End Confidential AI – Jitendra Singh & Anshuman Ghosh, Microsoft

Jitendra Singh, Senior Software Engineer, Microsoft and Anshuman Ghosh, Senior Software Engineer, Microsoft

As AI models scale, infrastructure limitations extend beyond raw compute to the efficient and secure movement of massive data sets – including model checkpoints, embeddings, and KV caches – across storage, networks, and accelerators. While Data Processing Units (DPUs) traditionally offloaded basic networking, storage, and security functions from host CPUs, they are rapidly evolving into intelligent, foundational building blocks for AI-native and security-first platforms. 

This session examines how next-generation DPU architectures act as a unified control and security layer, optimizing storage-to-accelerator data paths, enabling disaggregated storage, and providing tenant isolation, attestation, and confidential execution. Ultimately, attendees will gain key insights into how DPUs shape trusted, scalable AI infrastructure and the future of programmable storage architectures.

From Complexity to Deployment: Bridging the DPU Adoption Gap

Benoit Paquin, Kalray

Feeding the AI Factory: The Role of DPU/IPUs in AI Infrastructure

Tina Tsou, LF Edge Board Chair, Rajalaxmi Angadi, Senior Engineering Manager, Intel and Paul Pindell, Principal Architect, F5 Networks

As AI clusters scale to 800G+ fabrics, system performance is no longer constrained solely by raw GPU compute, but by data movement, storage I/O, and infrastructure overhead. Modern AI factories require a fundamental decoupling of application logic from infrastructure tasks – offloading virtual networking, NVMe-oF storage access for KV caches, security enforcement, and telemetry to dedicated Data and Infrastructure Processing Units (DPUs/IPUs).

This panel brings together industry leaders to discuss how DPUs and IPUs reclaim host CPU/GPU cycles, enforce hardware-isolated security air gaps, and optimize AI job completion times (JCT) across multi-tenant AI clusters. Crucially, the discussion will highlight the central role of the Open Programmable Infrastructure (OPI) Project in preventing vendor lock-in. The panel will explore how OPI’s unified northbound abstractions – such as standardized gRPC APIs, gNMI telemetry, and the community-driven DPU Operator – allow cloud providers and enterprise operators to manage heterogeneous silicon under a single, open AI factory blueprint.

How Open Hardware Access Builds the Next Generation of Infrastructure Engineers 

Sam Dasilva, Associate Software Engineer, Red Hat 

In this session, Sam traces his path as an engineer – from a CS student with no STEM pipeline, to a Red Hat intern working on DPU/SmartNIC integration, to an OPI LFX mentee who brought the DPU Operator upstream into OPI. The talk covers the technical handoff work involved (decoupling OpenShift-specific dependencies, supporting vanilla Kubernetes, validating across Fedora/CentOS Stream/AlmaLinux, and standing up multi-vendor community CI) and makes the case that open labs and mentorship grow both working code and working engineers.

Network Engine’s Hardware Matrix Problem, and Why DPUs Solve What NICs Can’t 

Josh Brooks, Chief Solutions Architect & Distinguished Technologist, WorldTech IT/Network Engine 

A candid look at the painful process of building a purpose-built network-appliance hypervisor across inconsistent NIC offload support. This session introduces OPI Blueprint 003 in which OVS offload is moved onto a DPU, starting with NVIDIA BlueField-3, and the push to turn a single vendor’s example into an ecosystem-wide standard for both KVM and KubeVirt.

KV-Cache Offload Without Hand-Waving: A Hierarchical Design and Evaluation Method

Jigar Kuverji Savla, ASIC Architect & Product Manager, Tensordyne

While offloading KV caches from accelerator memory offers enticing benefits like extended context lengths and freed memory for active computation, it risks losing more performance to data movement latency than it gains. This session presents a structured evaluation method and hierarchical caching framework – indexing reusable blocks across accelerator, host, and storage tiers – to help determine when DPU/IPU-assisted offload paths are genuinely worthwhile. Drawing on empirical data from active hierarchical KV-cache and NVMe-offload implementations in an inference server, the talk analyzes critical factors including block granularity, admission/eviction policies, transfer overlap, multi-device sharding, and telemetry. Attendees will walk away with a practical workload matrix, measurement plan, and concrete decision criteria to confidently evaluate whether moving an offload concept into a proof of concept is justified.

One Control Plane, Many DPU/IPUs: SONiC DASH and Open DSE Powered by OPI

Serey Kong, Tech Lead – Driver Architect, Intel Corporation and Mounire El Houmaidi, BE-NET Technologies

As DPU/IPU adoption grows, heterogeneous hardware and proprietary SDKs create software lock-in and verification hurdles. This session demonstrates how OPI acts as a vendor-neutral control plane across two practical multi-vendor deployment frameworks: SONiC DASH and Open DSE.  First, we present an in-process SAI-to-OPI adapter (libsai_opi_adapter.so) that translates SONiC DASH overlay objects (ENI, VNet, ACL) directly into OPI gRPC calls. By isolating proprietary vendor SDKs on the DPU SoC, host control planes remain unified across mixed-vendor racks. Second, we introduce Open DSE, an intent-driven framework that executes workloads across NVIDIA, Intel, AMD, and Marvell DPUs, using OPI to reconcile state and distinguish functional connectivity from true hardware offload. Together, these PoCs show how OPI bridges NOS control planes and multi-vendor execution to deliver verifiable, vendor-agnostic infrastructure offload.

Help Influence Where OPI Goes Next

From growing the next generation of DPU contributors to rebuilding storage daemons for a DPU-native world, this year’s sessions capture exactly where the open, vendor-neutral infrastructure movement stands today – and where the community wants to take it. These are the people writing the blueprints, running the live demos, and hitting the hard edge cases so the rest of the ecosystem doesn’t have to rediscover them alone.

Register now for the OPI Summit on DPU/IPUs and get in the room with the engineers building the open alternative to vendor-locked DPU and IPU infrastructure.

Register for OPI Summit on DPU/IPUs here.